The present invention relates to boundary scan logic and more specifically to a boundary-scan enable cell with a non-critical enable path.
Boundary-scan logic circuitry is commonly added to integrated circuits for testing and monitoring the integrated circuits. A discussion of boundary-scan logic can be found in the following publications: (1) IEEE standard 1149.1, entitled, "IEEE Standard Test Access port and Boundary-Scan Architecture", dated May 21, 1990; and (2) "A Standard Test Bus and Boundary Scan Architecture", by Lee Whetsel, TI Technical Journal, July-August 1988. These publications are hereby incorporated by reference.
Boundary-scan logic normally includes boundary-scan cells coupled between the pins and the system logic of an integrated circuit for external testing of pin connections and internal testing of system logic. Boundary-scan cells include test signal inputs and outputs through which the cells may be connected and scanned in serial fashion. One type of boundary-scan cell is an enable cell for providing a tristate enable signal for controlling the drive strength of an output driver.
Logic terms making up the core logic output include critical and non-critical terms. Critical terms are those which are active during normal operation and which must propagate to predetermined device pins in a minimal amount of time. Non-critical terms are those which may change only during diagnostics, error conditions, or other infrequent events. Such terms are generally asynchronous to the system clock or do not have strict timing requirements. Finally, non-critical enable terms can be used as masking terms to force an enable signal to be asserted or negated.
Boundary-scan cells normally include a shift register element, a shadow latch, and two multiplexers. One multiplexer selects between a core logic output defining a system path for carrying system tristate enable terms and a shadow latch output defining a test path for carrying test data. An inherent problem with these cells is that the one multiplexer causes delay in the transmission of system enable terms.
Therefore, it would be desirable to provide a boundary scan enable cell which separates critical enable terms from non-critical masking terms while minimizing the delay added to the system path.